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Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 85c33db07b..07a67cd630 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -218,6 +218,15 @@ struct soc_intel_cannonlake_config { uint8_t TcoIrqSelect; uint8_t TcoIrqEnable; + /* CPU PL2/4 Config + * Performance: Maximum PLs for maximum performance. + * Baseline: Baseline PLs for balanced performance at lower power. + */ + enum { + baseline, + performance + } cpu_pl2_4_cfg; + /* VrConfig Settings for 5 domains * 0 = System Agent, 1 = IA Core, 2 = Ring, * 3 = GT unsliced, 4 = GT sliced */ |