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-rw-r--r--src/soc/intel/cannonlake/chip.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index fd37d26492..752ec1f315 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -242,6 +242,9 @@ struct soc_intel_cannonlake_config {
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
+ /* Enables support for Teton Glacier hybrid storage device */
+ uint8_t TetonGlacierMode;
+
/* PL1 Override value in Watts */
uint32_t tdp_pl1_override;
/* PL2 Override value in Watts */