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Diffstat (limited to 'src/soc/intel/cannonlake/acpi/southbridge.asl')
-rw-r--r--src/soc/intel/cannonlake/acpi/southbridge.asl5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index e4f29b6a37..6fac398619 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2017 Intel Corp.
+ * Copyright (C) 2017-2018 Intel Corp.
* (Written by Bora Guvendik <bora.guvendik@intel.com> for Intel Corp.)
*
* This program is free software; you can redistribute it and/or modify
@@ -48,3 +48,6 @@
/* CNVi */
#include "cnvi.asl"
+
+/* GBe 0:1f.6 */
+#include "pch_glan.asl"