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Diffstat (limited to 'src/soc/intel/cannonlake/acpi/cnvi.asl')
-rw-r--r--src/soc/intel/cannonlake/acpi/cnvi.asl32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi/cnvi.asl b/src/soc/intel/cannonlake/acpi/cnvi.asl
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--- /dev/null
+++ b/src/soc/intel/cannonlake/acpi/cnvi.asl
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/pm.h>
+
+/* CNVi Controller 0:14.3 */
+Device (CNVI) {
+ Name(_ADR, 0x00140003)
+
+ Name (_S3D, 3) /* D3 supported in S3 */
+ Name (_S0W, 3) /* D3 can wake device in S0 */
+ Name (_S3W, 3) /* D3 can wake system from S3 */
+
+ Name (_PRW, Package() { PME_B0_EN_BIT, 3 })
+
+ Method (_STA, 0)
+ {
+ Return (0xF)
+ }
+}