diff options
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/cpu.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/smi.c | 9 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index 859db7f1ec..4bfa15d354 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -494,7 +494,7 @@ static void post_mp_init(void) /* Now that all APs have been relocated as well as the BSP let SMIs * start flowing. */ - smm_southbridge_enable_smi(); + global_smi_enable(); /* Lock down the SMRAM space. */ smm_lock(); diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c index 1d3860a982..939815a998 100644 --- a/src/soc/intel/broadwell/smi.c +++ b/src/soc/intel/broadwell/smi.c @@ -32,11 +32,11 @@ void smm_southbridge_clear_state(void) clear_gpe_status(); } -void smm_southbridge_enable_smi(void) +static void smm_southbridge_enable(uint16_t pm1_events) { printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ - enable_pm1(PWRBTN_EN | GBL_EN); + enable_pm1(pm1_events); disable_gpe(PME_B0_EN); /* Enable SMI generation: @@ -50,6 +50,11 @@ void smm_southbridge_enable_smi(void) enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); } +void global_smi_enable(void) +{ + smm_southbridge_enable(PWRBTN_EN | GBL_EN); +} + static void __unused southbridge_trigger_smi(void) { /** |