aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/romstage/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/broadwell/romstage/romstage.c')
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 849c55d3e8..7c74aa4b8a 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -38,8 +38,8 @@
#include <vendorcode/google/chromeos/chromeos.h>
/* Entry from cache-as-ram.inc. */
-void * asmlinkage romstage_main(unsigned long bist,
- uint32_t tsc_low, uint32_t tsc_hi)
+asmlinkage void *romstage_main(unsigned long bist,
+ uint32_t tsc_low, uint32_t tsc_hi)
{
struct romstage_params rp = {
.bist = bist,