1 files changed, 14 insertions, 14 deletions

diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index 724f26328f..3fd5ea4f10 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -48,23 +48,23 @@ struct root_port_config {
 	int coalesce;
 	int gbe_port;
 	int num_ports;
-	device_t ports[NUM_ROOT_PORTS];
+	struct device *ports[NUM_ROOT_PORTS];
 };
 
 static struct root_port_config rpc;
 
-static inline int root_port_is_first(device_t dev)
+static inline int root_port_is_first(struct device *dev)
 {
 	return PCI_FUNC(dev->path.pci.devfn) == 0;
 }
 
-static inline int root_port_is_last(device_t dev)
+static inline int root_port_is_last(struct device *dev)
 {
 	return PCI_FUNC(dev->path.pci.devfn) == (rpc.num_ports - 1);
 }
 
 /* Root ports are numbered 1..N in the documentation. */
-static inline int root_port_number(device_t dev)
+static inline int root_port_number(struct device *dev)
 {
 	return PCI_FUNC(dev->path.pci.devfn) + 1;
 }
@@ -94,7 +94,7 @@ static void root_port_config_update_gbe_port(void)
 	}
 }
 
-static void pcie_iosf_port_grant_count(device_t dev)
+static void pcie_iosf_port_grant_count(struct device *dev)
 {
 	u8 update_val;
 	u32 rpcd = (pci_read_config32(dev, 0xfc) >> 14) & 0x3;
@@ -115,7 +115,7 @@ static void pcie_iosf_port_grant_count(device_t dev)
 	RCBA32(0x103C) = (RCBA32(0x103C) & (~0xff)) | update_val;
 }
 
-static void root_port_init_config(device_t dev)
+static void root_port_init_config(struct device *dev)
 {
 	int rp;
 	u32 data = 0;
@@ -186,7 +186,7 @@ static void root_port_init_config(device_t dev)
 /* Update devicetree with new Root Port function number assignment */
 static void pch_pcie_device_set_func(int index, int pci_func)
 {
-	device_t dev;
+	struct device *dev;
 	unsigned int new_devfn;
 
 	dev = rpc.ports[index];
@@ -216,7 +216,7 @@ static void pcie_enable_clock_gating(void)
 	int is_broadwell = !!(cpu_family_model() == BROADWELL_FAMILY_ULT);
 
 	for (i = 0; i < rpc.num_ports; i++) {
-		device_t dev;
+		struct device *dev;
 		int rp;
 
 		dev = rpc.ports[i];
@@ -294,7 +294,7 @@ static void root_port_commit_config(void)
 	pcie_enable_clock_gating();
 
 	for (i = 0; i < rpc.num_ports; i++) {
-		device_t dev;
+		struct device *dev;
 		u32 reg32;
 		int n = 0;
 
@@ -359,7 +359,7 @@ static void root_port_commit_config(void)
 	RCBA32(RPFN) = rpc.new_rpfn;
 }
 
-static void root_port_mark_disable(device_t dev)
+static void root_port_mark_disable(struct device *dev)
 {
 	/* Mark device as disabled. */
 	dev->enabled = 0;
@@ -367,7 +367,7 @@ static void root_port_mark_disable(device_t dev)
 	rpc.new_rpfn |= RPFN_HIDE(PCI_FUNC(dev->path.pci.devfn));
 }
 
-static void root_port_check_disable(device_t dev)
+static void root_port_check_disable(struct device *dev)
 {
 	int rp;
 
@@ -629,7 +629,7 @@ static void pch_pcie_init(struct device *dev)
 	pci_write_config16(dev, 0x1e, reg16);
 }
 
-static void pch_pcie_enable(device_t dev)
+static void pch_pcie_enable(struct device *dev)
 {
 	/* Add this device to the root port config structure. */
 	root_port_init_config(dev);
@@ -649,7 +649,7 @@ static void pch_pcie_enable(device_t dev)
 		root_port_commit_config();
 }
 
-static void pcie_set_subsystem(device_t dev, unsigned int vendor,
+static void pcie_set_subsystem(struct device *dev, unsigned int vendor,
 	unsigned int device)
 {
 	/* NOTE: This is not the default position! */
@@ -659,7 +659,7 @@ static void pcie_set_subsystem(device_t dev, unsigned int vendor,
 		pci_write_config32(dev, 0x94, (device << 16) | vendor);
 }
 
-static void pcie_set_L1_ss_max_latency(device_t dev, unsigned int off)
+static void pcie_set_L1_ss_max_latency(struct device *dev, unsigned int off)
 {
 	/* Set max snoop and non-snoop latency for Broadwell */
 	pci_write_config32(dev, off, 0x10031003);