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Diffstat (limited to 'src/soc/intel/broadwell/cpu.c')
-rw-r--r--src/soc/intel/broadwell/cpu.c26
1 files changed, 0 insertions, 26 deletions
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 8e05998c19..1f2ee0d7ba 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -103,32 +103,6 @@ static const u8 power_limit_time_msr_to_sec[] = {
[0x11] = 128,
};
-u32 cpu_family_model(void)
-{
- return cpuid_eax(1) & 0x0fff0ff0;
-}
-
-u32 cpu_stepping(void)
-{
- return cpuid_eax(1) & 0xf;
-}
-
-/* Dynamically determine if the part is ULT. */
-int cpu_is_ult(void)
-{
- static int ult = -1;
-
- if (ult < 0) {
- u32 fm = cpu_family_model();
- if (fm == BROADWELL_FAMILY_ULT || fm == HASWELL_FAMILY_ULT)
- ult = 1;
- else
- ult = 0;
- }
-
- return ult;
-}
-
/* The core 100MHz BLCK is disabled in deeper c-states. One needs to calibrate
* the 100MHz BCLCK against the 24MHz BLCK to restore the clocks properly
* when a core is woken up. */