diff options
Diffstat (limited to 'src/soc/intel/broadwell/acpi')
| -rw-r--r-- | src/soc/intel/broadwell/acpi/globalnvs.asl | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/src/soc/intel/broadwell/acpi/globalnvs.asl b/src/soc/intel/broadwell/acpi/globalnvs.asl index 9bddbc212c..223d21a676 100644 --- a/src/soc/intel/broadwell/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/acpi/globalnvs.asl @@ -53,16 +53,15 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TCRT, 8, // 0x10 - Critical Threshold TPSV, 8, // 0x11 - Passive Threshold TMAX, 8, // 0x12 - CPU Tj_max - , 8, // 0x13 - Unused - S5U0, 8, // 0x14 - Enable USB in S5 - S3U0, 8, // 0x15 - Enable USB in S3 - S33G, 8, // 0x16 - Enable 3G in S3 - LIDS, 8, // 0x17 - LID State - PWRS, 8, // 0x18 - AC Power State - CMEM, 32, // 0x19 - 0x1c - CBMEM TOC - CBMC, 32, // 0x1d - 0x20 - Coreboot Memory Console - PM1I, 32, // 0x21 - 0x24 - PM1 wake status bit - GPEI, 32, // 0x25 - 0x28 - GPE wake status bit + S5U0, 8, // 0x13 - Enable USB in S5 + S3U0, 8, // 0x14 - Enable USB in S3 + S33G, 8, // 0x15 - Enable 3G in S3 + LIDS, 8, // 0x16 - LID State + PWRS, 8, // 0x17 - AC Power State + CMEM, 32, // 0x18 - 0x1b - CBMEM TOC + CBMC, 32, // 0x1c - 0x1f - Coreboot Memory Console + PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit + GPEI, 64, // 0x28 - 0x2f - GPE wake status bit /* ChromeOS specific */ Offset (0x100), |