diff options
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/include/soc/romstage.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h index a735c04db5..0f24f71c9f 100644 --- a/src/soc/intel/braswell/include/soc/romstage.h +++ b/src/soc/intel/braswell/include/soc/romstage.h @@ -33,6 +33,7 @@ void tco_disable(void); void punit_init(void); int early_spi_read_wpsr(u8 *sr); void mainboard_fill_spd_data(struct pei_data *pei_data); +void set_max_freq(void); /* romstage_common.c functions */ void program_base_addresses(void); diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 00710fe837..87b1af09df 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -181,6 +181,7 @@ void soc_pre_console_init(void) void soc_romstage_init(struct romstage_params *params) { /* Continue chipset initialization */ + set_max_freq(); spi_init(); #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |