summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell/memmap.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/braswell/memmap.c')
-rw-r--r--src/soc/intel/braswell/memmap.c38
1 files changed, 0 insertions, 38 deletions
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 51b7b36db4..b4c69a4258 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -34,44 +34,6 @@ void smm_region(uintptr_t *start, size_t *size)
*size = smm_region_size();
}
-/*
- * Subregions within SMM
- * +-------------------------+ BUNIT_SMRRH
- * | External Stage Cache | SMM_RESERVED_SIZE
- * +-------------------------+
- * | code and data |
- * | (TSEG) |
- * +-------------------------+ BUNIT_SMRRL
- */
-int smm_subregion(int sub, uintptr_t *start, size_t *size)
-{
- uintptr_t sub_base;
- size_t sub_size;
- const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
-
- smm_region(&sub_base, &sub_size);
-
- switch (sub) {
- case SMM_SUBREGION_HANDLER:
- /* Handler starts at the base of TSEG. */
- sub_size -= cache_size;
- break;
- case SMM_SUBREGION_CACHE:
- /* External cache is in the middle of TSEG. */
- sub_base += sub_size - cache_size;
- sub_size = cache_size;
- break;
- default:
- *start = 0;
- *size = 0;
- return -1;
- }
-
- *start = sub_base;
- *size = sub_size;
- return 0;
-}
-
void *cbmem_top(void)
{
uintptr_t smm_base;