diff options
Diffstat (limited to 'src/soc/intel/braswell/include/soc/ramstage.h')
| -rw-r--r-- | src/soc/intel/braswell/include/soc/ramstage.h | 26 |
1 files changed, 12 insertions, 14 deletions
diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h index fc2b614bb5..f1712433db 100644 --- a/src/soc/intel/braswell/include/soc/ramstage.h +++ b/src/soc/intel/braswell/include/soc/ramstage.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,26 +18,23 @@ * Foundation, Inc. */ -#ifndef _BAYTRAIL_RAMSTAGE_H_ -#define _BAYTRAIL_RAMSTAGE_H_ +#ifndef _SOC_RAMSTAGE_H_ +#define _SOC_RAMSTAGE_H_ +#include <chip.h> #include <device/device.h> -#include <soc/intel/baytrail/chip.h> +#include <soc/intel/common/ramstage.h> -/* The baytrail_init_pre_device() function is called prior to device - * initialization, but it's after console and cbmem has been reinitialized. */ -void baytrail_init_pre_device(struct soc_intel_baytrail_config *config); -void baytrail_init_cpus(device_t dev); +/* + * The soc_init_pre_device() function is called prior to device + * initialization, but it's after console and cbmem has been reinitialized. + */ +void soc_init_pre_device(struct soc_intel_braswell_config *config); +void soc_init_cpus(device_t dev); void set_max_freq(void); void southcluster_enable_dev(device_t dev); -#if CONFIG_HAVE_REFCODE_BLOB -void baytrail_run_reference_code(void); -#else -static inline void baytrail_run_reference_code(void) {} -#endif -void baytrail_init_scc(void); void scc_enable_acpi_mode(device_t dev, int iosf_reg, int nvs_index); extern struct pci_operations soc_pci_ops; -#endif /* _BAYTRAIL_RAMSTAGE_H_ */ +#endif /* _SOC_RAMSTAGE_H_ */ |