diff options
Diffstat (limited to 'src/soc/intel/braswell/bootblock/bootblock.c')
| -rw-r--r-- | src/soc/intel/braswell/bootblock/bootblock.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c index 6d31add508..f98f694f41 100644 --- a/src/soc/intel/braswell/bootblock/bootblock.c +++ b/src/soc/intel/braswell/bootblock/bootblock.c @@ -2,13 +2,14 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Google, Inc. + * Copyright (C) 2015 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of + * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * @@ -54,10 +55,12 @@ static void setup_mmconfig(void) { uint32_t reg; - /* Set up the MMCONF range. The register lives in the BUNIT. The + /* + * Set up the MMCONF range. The register lives in the BUNIT. The * IO variant of the config access needs to be used initially to * properly configure as the IOSF access registers live in PCI - * config space. */ + * config space. + */ reg = 0; /* Clear the extended register. */ pci_io_write_config32(IOSF_PCI_DEV, MCRX_REG, reg); |