diff options
Diffstat (limited to 'src/soc/intel/baytrail/ramstage.c')
| -rw-r--r-- | src/soc/intel/baytrail/ramstage.c | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index 9fe6c27dfe..e8f441f3c1 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -36,6 +36,7 @@ #include <baytrail/nvs.h> #include <baytrail/pattrs.h> #include <baytrail/pci_devs.h> +#include <baytrail/pmc.h> #include <baytrail/ramstage.h> /* Global PATTRS */ @@ -71,7 +72,9 @@ static inline void fill_in_msr(msr_t *msr, int idx) } } -static const char *stepping_str[] = { "A0", "A1", "B0", "B1", "B2", "B3" }; +static const char *stepping_str[] = { + "A0", "A1", "B0", "B1", "B2", "B3", "C0" +}; static void fill_in_pattrs(void) { @@ -83,7 +86,10 @@ static void fill_in_pattrs(void) dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ - if (attrs->revid >= RID_B_STEPPING_START) { + if (attrs->revid >= RID_C_STEPPING_START) { + attrs->stepping = (attrs->revid - RID_C_STEPPING_START) / 2; + attrs->stepping += STEP_C0; + } else if (attrs->revid >= RID_B_STEPPING_START) { attrs->stepping = (attrs->revid - RID_B_STEPPING_START) / 2; attrs->stepping += STEP_B0; } else { @@ -131,6 +137,32 @@ static inline void set_acpi_sleep_type(int val) #endif } +/* Save bit index for first enabled event in PM1_STS for \_SB._SWS */ +static void s3_save_acpi_wake_source(global_nvs_t *gnvs) +{ + struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); + uint16_t pm1; + + if (!ps) + return; + + pm1 = ps->pm1_sts & ps->pm1_en; + + /* Scan for first set bit in PM1 */ + for (gnvs->pm1i = 0; gnvs->pm1i < 16; gnvs->pm1i++) { + if (pm1 & 1) + break; + pm1 >>= 1; + } + + /* If unable to determine then return -1 */ + if (gnvs->pm1i >= 16) + gnvs->pm1i = -1; + + printk(BIOS_DEBUG, "ACPI System Wake Source is PM1 Index %d\n", + gnvs->pm1i); +} + static void s3_resume_prepare(void) { global_nvs_t *gnvs; @@ -148,6 +180,8 @@ static void s3_resume_prepare(void) } set_acpi_sleep_type(3); + + s3_save_acpi_wake_source(gnvs); } void baytrail_init_pre_device(void) |