summaryrefslogtreecommitdiff
path: root/src/soc/intel/baytrail/memmap.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/baytrail/memmap.c')
-rw-r--r--src/soc/intel/baytrail/memmap.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c
index 211f476712..94e91ca7a1 100644
--- a/src/soc/intel/baytrail/memmap.c
+++ b/src/soc/intel/baytrail/memmap.c
@@ -14,6 +14,7 @@
*/
#include <cbmem.h>
+#include <stage_cache.h>
#include <soc/iosf.h>
#include <soc/smm.h>
@@ -26,3 +27,16 @@ void *cbmem_top(void)
{
return (void *) smm_region_start();
}
+
+void stage_cache_external_region(void **base, size_t *size)
+{
+ char *smm_base;
+ /* 1MiB cache size */
+ const long cache_size = CONFIG_SMM_RESERVED_SIZE;
+
+ /* Ramstage cache lives in TSEG region which is the definition of
+ * cbmem_top(). */
+ smm_base = cbmem_top();
+ *size = cache_size;
+ *base = &smm_base[smm_region_size() - cache_size];
+}