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Diffstat (limited to 'src/soc/intel/baytrail/acpi/southcluster.asl')
-rw-r--r--src/soc/intel/baytrail/acpi/southcluster.asl23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index 87b5b6e386..7aabcf3fa0 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -19,6 +19,8 @@
* MA 02110-1301 USA
*/
+#include <soc/intel/baytrail/baytrail/iomap.h>
+
Scope(\)
{
// IO-Trap at 0x800. This is the ACPI->SMI communication interface.
@@ -29,6 +31,21 @@ Scope(\)
Offset(0x8),
TRP0, 8 // IO-Trap at 0x808
}
+
+ // Intel Legacy Block
+ OperationRegion(ILBS, SystemMemory, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
+ Field (ILBS, AnyAcc, NoLock, Preserve)
+ {
+ Offset (0x8),
+ PRTA, 8,
+ PRTB, 8,
+ PRTC, 8,
+ PRTD, 8,
+ PRTE, 8,
+ PRTF, 8,
+ PRTG, 8,
+ PRTH, 8,
+ }
}
Name(_HID,EISAID("PNP0A08")) // PCIe
@@ -210,3 +227,9 @@ Method (_OSC, 4)
Return (Arg3)
}
}
+
+// LPC Bridge 0:1f.0
+#include "lpc.asl"
+
+// IRQ routing for each PCI device
+#include "irqroute.asl"