aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/apollolake
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/chip.c5
-rw-r--r--src/soc/intel/apollolake/chip.h7
2 files changed, 3 insertions, 9 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 31b6b1747f..081bba373e 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -28,9 +28,10 @@
#include <device/device.h>
#include <device/pci.h>
#include <intelblocks/acpi.h>
+#include <intelblocks/chip.h>
#include <intelblocks/fast_spi.h>
-#include <intelblocks/p2sb.h>
#include <intelblocks/msr.h>
+#include <intelblocks/p2sb.h>
#include <intelblocks/xdci.h>
#include <fsp/api.h>
#include <fsp/util.h>
@@ -614,7 +615,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
if (!IS_ENABLED(CONFIG_SOC_INTEL_GLK))
silconfig->MonitorMwaitEnable = 0;
- silconfig->SkipMpInit = !cfg->use_fsp_mp_init;
+ silconfig->SkipMpInit = !chip_get_fsp_mp_init();
/* Disable setting of EISS bit in FSP. */
silconfig->SpiEiss = 0;
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 4f586acfd1..61ddedaf49 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -150,13 +150,6 @@ struct soc_intel_apollolake_config {
* (1) Power
* (2) Power & Performance */
enum pnp_settings pnp_settings;
-
- /*
- * Option for mainboard to skip coreboot MP initialization
- * 0 = Make use of coreboot MP Init
- * 1 = Make use of FSP MP Init
- */
- uint8_t use_fsp_mp_init;
};
typedef struct soc_intel_apollolake_config config_t;