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-rw-r--r--src/soc/intel/apollolake/Kconfig7
-rw-r--r--src/soc/intel/apollolake/reset.c7
-rw-r--r--src/soc/intel/apollolake/romstage.c4
3 files changed, 8 insertions, 10 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 81709422d0..1872ed0feb 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -104,7 +104,8 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_0
select UDK_2015_BINDING if !SOC_INTEL_GLK
select UDK_2017_BINDING if SOC_INTEL_GLK
- select HAVE_HARD_RESET
+ select SOC_INTEL_COMMON_RESET
+ select HAVE_CF9_RESET_PREPARE
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select HAVE_FSP_GOP
select NO_UART_ON_SUPERIO
@@ -130,10 +131,6 @@ config TPM_ON_FAST_SPI
TPM part is conntected on Fast SPI interface, but the LPC MMIO
TPM transactions are decoded and serialized over the SPI interface.
-config SOC_INTEL_COMMON_RESET
- bool
- default y
-
config PCR_BASE_ADDRESS
hex
default 0xd0000000
diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c
index 6ea7a5998e..36bf77b240 100644
--- a/src/soc/intel/apollolake/reset.c
+++ b/src/soc/intel/apollolake/reset.c
@@ -13,12 +13,13 @@
* GNU General Public License for more details.
*/
+#include <cf9_reset.h>
#include <console/console.h>
#include <delay.h>
#include <fsp/util.h>
#include <intelblocks/pmclib.h>
-#include <reset.h>
#include <soc/heci.h>
+#include <soc/intel/common/reset.h>
#include <soc/pm.h>
#include <timer.h>
@@ -27,10 +28,10 @@
void do_global_reset(void)
{
pmc_global_reset_enable(1);
- hard_reset();
+ do_full_reset();
}
-void soc_reset_prepare(enum reset_type reset_type)
+void cf9_reset_prepare(void)
{
struct stopwatch sw;
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 995564d717..d2ec6c1fa8 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -24,6 +24,7 @@
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
+#include <cf9_reset.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/pae.h>
@@ -38,7 +39,6 @@
#include <intelblocks/systemagent.h>
#include <intelblocks/pmclib.h>
#include <mrc_cache.h>
-#include <reset.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/meminit.h>
@@ -285,7 +285,7 @@ static void check_full_retrain(const FSPM_UPD *mupd)
if (ps->gen_pmcon1 & WARM_RESET_STS) {
printk(BIOS_INFO, "Full retrain unsupported on warm reboot.\n");
- hard_reset();
+ full_reset();
}
}