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-rw-r--r--src/soc/intel/apollolake/acpi/cnvi.asl30
-rw-r--r--src/soc/intel/apollolake/acpi/southbridge.asl6
2 files changed, 0 insertions, 36 deletions
diff --git a/src/soc/intel/apollolake/acpi/cnvi.asl b/src/soc/intel/apollolake/acpi/cnvi.asl
deleted file mode 100644
index a4d255dc1f..0000000000
--- a/src/soc/intel/apollolake/acpi/cnvi.asl
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* CNVi Controller 0:C.0 */
-Device (CNVI) {
- Name(_ADR, 0x000C0000)
-
- Name (_S3D, 3) /* D3 supported in S3 */
- Name (_S0W, 3) /* D3 can wake device in S0 */
- Name (_S3W, 3) /* D3 can wake system from S3 */
-
- Name (_PRW, Package() { GPE0A_CNVI_PME_STS, 3 })
-
- Method (_STA, 0)
- {
- Return (0xF)
- }
-}
diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl
index 9f14db48b4..799778bc3c 100644
--- a/src/soc/intel/apollolake/acpi/southbridge.asl
+++ b/src/soc/intel/apollolake/acpi/southbridge.asl
@@ -47,10 +47,4 @@
/* SGX */
#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX)
#include <soc/intel/common/acpi/sgx.asl>
-
-/* CNVi */
-#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)
-#include "cnvi.asl"
-#endif
-
#endif