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-rw-r--r--src/soc/intel/apollolake/Makefile.inc1
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h2
-rw-r--r--src/soc/intel/apollolake/pmutil.c18
3 files changed, 1 insertions, 20 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 79fab1a9d1..64889e56f9 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -10,6 +10,7 @@ subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c
+bootblock-y += ../common/block/cpu/pm_timer_emulation.c
bootblock-$(CONFIG_FSP_CAR) += fspcar.c
bootblock-y += car.c
bootblock-y += heci.c
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index aaf62583e6..748f76adba 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -234,8 +234,6 @@ struct chipset_power_state {
void pch_log_state(void);
-void enable_pm_timer_emulation(void);
-
/* STM Support */
uint16_t get_pmbase(void);
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index e0de93eae4..6e96b57a07 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -178,24 +178,6 @@ int soc_prev_sleep_state(const struct chipset_power_state *ps,
return prev_sleep_state;
}
-void enable_pm_timer_emulation(void)
-{
- msr_t msr;
-
- if (!CONFIG_CPU_XTAL_HZ)
- return;
-
- /*
- * The derived frequency is calculated as follows:
- * (clock * msr[63:32]) >> 32 = target frequency.
- * Back solve the multiplier so the 3.579545MHz ACPI timer frequency is used.
- */
- msr.hi = (3579545ULL << 32) / CONFIG_CPU_XTAL_HZ;
- /* Set PM1 timer IO port and enable */
- msr.lo = EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + R_ACPI_PM1_TMR);
- wrmsr(MSR_EMULATE_PM_TIMER, msr);
-}
-
static int rtc_failed(uint32_t gen_pmcon1)
{
return !!(gen_pmcon1 & RPS);