diff options
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index bdd6e8c9d9..d14dd8d3ee 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -73,23 +73,6 @@ static void soc_early_romstage_init(void) P2SB_HPTC_ADDRESS_ENABLE); } -/* Thermal throttle activation offset */ -static void configure_thermal_target(void) -{ - msr_t msr; - const config_t *conf = config_of_soc(); - - if (!conf->tcc_offset) - return; - - msr = rdmsr(MSR_TEMPERATURE_TARGET); - /* Bits 27:24 */ - msr.lo &= ~(TEMPERATURE_TCC_MASK << TEMPERATURE_TCC_SHIFT); - msr.lo |= (conf->tcc_offset & TEMPERATURE_TCC_MASK) - << TEMPERATURE_TCC_SHIFT; - wrmsr(MSR_TEMPERATURE_TARGET, msr); -} - /* * Punit Initialization code. This all isn't documented, but * this is the recipe. @@ -101,7 +84,7 @@ static bool punit_init(void) struct stopwatch sw; /* Thermal throttle activation offset */ - configure_thermal_target(); + configure_tcc_thermal_target(); /* * Software Core Disable Mask (P_CR_CORE_DISABLE_MASK_0_0_0_MCHBAR). |