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Diffstat (limited to 'src/soc/intel/apollolake/pmutil.c')
-rw-r--r--src/soc/intel/apollolake/pmutil.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index c88e5ae8bf..12a1051246 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -21,10 +21,12 @@
#include <arch/io.h>
#include <console/console.h>
#include <cbmem.h>
+#include <cpu/x86/msr.h>
#include <rules.h>
#include <device/pci_def.h>
#include <halt.h>
#include <soc/iomap.h>
+#include <soc/cpu.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <device/device.h>
@@ -551,3 +553,19 @@ void pmc_gpe_init(void)
/* Set the routes in the GPIO communities as well. */
gpio_route_gpe(dw1, dw2, dw3);
}
+
+void enable_pm_timer_emulation(void)
+{
+ /* ACPI PM timer emulation */
+ msr_t msr;
+ /*
+ * The derived frequency is calculated as follows:
+ * (CTC_FREQ * msr[63:32]) >> 32 = target frequency.
+ * Back solve the multiplier so the 3.579545MHz ACPI timer
+ * frequency is used.
+ */
+ msr.hi = (3579545ULL << 32) / CTC_FREQ;
+ /* Set PM1 timer IO port and enable*/
+ msr.lo = EMULATE_PM_TMR_EN | (ACPI_PMIO_BASE + R_ACPI_PM1_TMR);
+ wrmsr(MSR_EMULATE_PM_TMR, msr);
+}