diff options
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/acpi.h | 28 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 17 |
2 files changed, 17 insertions, 28 deletions
diff --git a/src/soc/intel/apollolake/include/soc/acpi.h b/src/soc/intel/apollolake/include/soc/acpi.h deleted file mode 100644 index ba3b8fc9b5..0000000000 --- a/src/soc/intel/apollolake/include/soc/acpi.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Intel Corp. - * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_APOLLOLAKE_ACPI_H_ -#define _SOC_APOLLOLAKE_ACPI_H_ - -#include <arch/acpi.h> - -unsigned long southbridge_write_acpi_tables(device_t device, - unsigned long current, struct acpi_rsdp *rsdp); - -void southbridge_inject_dsdt(device_t device); - -#endif /* _SOC_APOLLOLAKE_ACPI_H_ */ diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 3be39554ed..37e4cedc3e 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -202,6 +202,23 @@ #define PMC_GPE_W_31_0 9 #endif +#define IRQ_REG 0x106C +#define SCI_IRQ_ADJUST 24 +#define SCI_IRQ_SEL (255 << SCI_IRQ_ADJUST) +#define SCIS_IRQ9 9 +#define SCIS_IRQ10 10 +#define SCIS_IRQ11 11 +#define SCIS_IRQ20 20 +#define SCIS_IRQ21 21 +#define SCIS_IRQ22 22 +#define SCIS_IRQ23 23 + +/* P-state configuration */ +#define PSS_MAX_ENTRIES 8 +#define PSS_RATIO_STEP 2 +#define PSS_LATENCY_TRANSITION 10 +#define PSS_LATENCY_BUSMASTER 10 + /* Track power state from reset to log events. */ struct chipset_power_state { uint16_t pm1_sts; |