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-rw-r--r--src/soc/intel/apollolake/include/soc/acpi.h2
-rw-r--r--src/soc/intel/apollolake/include/soc/nvs.h37
2 files changed, 39 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/acpi.h b/src/soc/intel/apollolake/include/soc/acpi.h
index 2d208054d2..3605cc3256 100644
--- a/src/soc/intel/apollolake/include/soc/acpi.h
+++ b/src/soc/intel/apollolake/include/soc/acpi.h
@@ -25,4 +25,6 @@ void soc_fill_common_fadt(acpi_fadt_t * fadt);
unsigned long southbridge_write_acpi_tables(device_t device,
unsigned long current, struct acpi_rsdp *rsdp);
+void southbridge_inject_dsdt(device_t device);
+
#endif /* _SOC_APOLLOLAKE_ACPI_H_ */
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
new file mode 100644
index 0000000000..8b3a3afe5c
--- /dev/null
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * NOTE: The layout of the global_nvs_t structure below must match the layout
+ * in soc/intel/apollolake/acpi/globalnvs.asl !!!
+ *
+ */
+
+#ifndef _SOC_APOLLOLAKE_NVS_H_
+#define _SOC_APOLLOLAKE_NVS_H_
+
+#include <vendorcode/google/chromeos/gnvs.h>
+
+struct global_nvs_t {
+ /* Miscellaneous */
+ uint8_t unused[256];
+
+ /* ChromeOS specific (0x100 - 0xfff) */
+ chromeos_acpi_t chromeos;
+} __attribute__((packed));
+
+#endif /* _SOC_APOLLOLAKE_NVS_H_ */