diff options
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/gpio.h | 19 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/gpio_defs.h | 27 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/smm.h | 3 |
4 files changed, 50 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h index 8ef74bb70a..00894448c8 100644 --- a/src/soc/intel/apollolake/include/soc/gpio.h +++ b/src/soc/intel/apollolake/include/soc/gpio.h @@ -25,6 +25,25 @@ typedef uint32_t gpio_t; +/* + * Structure to represent GPI status for GPE and SMI. Use helper + * functions for interrogating particular GPIs. Here the number of + * array elements is total number of groups that can be present in all + * the communities. + */ +struct gpi_status { + uint32_t grp[NUM_GPI_STATUS_REGS]; +}; + +/* + * Clear GPI SMI status and fill in the structure representing enabled + * and set status. + */ +void gpi_clear_get_smi_status(struct gpi_status *sts); + +/* Return 1 if gpio is set in the gpi_status struct. Otherwise 0. */ +int gpi_status_get(const struct gpi_status *sts, gpio_t gpi); + #define PAD_FUNC(value) PAD_CFG0_MODE_##value #define PAD_RESET(value) PAD_CFG0_RESET_##value #define PAD_PULL(value) PAD_CFG1_PULL_##value diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h index d85f844823..88fa475b5c 100644 --- a/src/soc/intel/apollolake/include/soc/gpio_defs.h +++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h @@ -38,6 +38,8 @@ #define GPIO_GPE_N_31_0 7 /* NORTH GPIO# 0 ~ 31 belong to GROUP7 */ #define GPIO_GPE_N_63_32 8 /* NORTH GPIO# 32 ~ 61 belong to GROUP8 */ +#define GPIO_MAX_NUM_PER_GROUP 32 + #define MISCCFG_GPE0_DW0_SHIFT 8 #define MISCCFG_GPE0_DW0_MASK (0xf << MISCCFG_GPE0_DW0_SHIFT) #define MISCCFG_GPE0_DW1_SHIFT 12 @@ -134,6 +136,31 @@ #define GPIO_NORTH 0xc5 #define GPIO_WEST 0xc7 +#define GPI_SMI_STS_0 0x140 +#define GPI_SMI_EN_0 0x150 +#define GPI_SMI_STS_OFFSET(group) (GPI_SMI_STS_0 + ((group) * 4)) +#define GPI_SMI_EN_OFFSET(group) (GPI_SMI_EN_0 + ((group) * 4)) + +#define NUM_N_PADS (PAD_N(SVID0_CLK) + 1) +#define NUM_NW_PADS (PAD_NW(GPIO_123) + 1) +#define NUM_W_PADS (PAD_W(SUSPWRDNACK) + 1) +#define NUM_SW_PADS (PAD_SW(LPC_FRAMEB) + 1) + +#define NUM_N_GPI_REGS \ + (ALIGN_UP(NUM_N_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP) + +#define NUM_NW_GPI_REGS \ + (ALIGN_UP(NUM_NW_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP) + +#define NUM_W_GPI_REGS \ + (ALIGN_UP(NUM_W_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP) + +#define NUM_SW_GPI_REGS \ + (ALIGN_UP(NUM_SW_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP) + +#define NUM_GPI_STATUS_REGS (NUM_N_GPI_REGS + NUM_NW_GPI_REGS \ + + NUM_W_GPI_REGS + NUM_SW_GPI_REGS) + /* North community pads */ #define GPIO_0 0 #define GPIO_1 1 diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 467c8f159c..5641e54c50 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -70,6 +70,7 @@ #define USB_EN (1 << SMI_XHCI) /* Legacy USB2 SMI logic */ #define PERIODIC_EN (1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */ #define TCO_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */ +#define GPIO_EN (1 << SMI_GPIO) /* Enable GPIO SMI */ #define BIOS_RLS (1 << SMI_BIOS_RLS) /* asserts SCI on bit set */ #define SWSMI_TMR_EN (1 << SMI_SWSMI_TMR) /* start software smi timer on bit set */ #define APMC_EN (1 << SMI_APMC) /* Writes to APM_CNT cause SMI# */ diff --git a/src/soc/intel/apollolake/include/soc/smm.h b/src/soc/intel/apollolake/include/soc/smm.h index 07749745d9..7a9846eea2 100644 --- a/src/soc/intel/apollolake/include/soc/smm.h +++ b/src/soc/intel/apollolake/include/soc/smm.h @@ -19,6 +19,7 @@ #define _SOC_SMM_H_ #include <stdint.h> +#include <soc/gpio.h> /* These helpers are for performing SMM relocation. */ void southbridge_clear_smi_status(void); @@ -31,6 +32,8 @@ void southbridge_clear_smi_status(void); void southbridge_smm_clear_state(void); void southbridge_smm_enable_smi(void); +/* Mainboard handler for GPI SMIs*/ +void mainboard_smi_gpi_handler(const struct gpi_status *sts); /* Fills in the arguments for the entire SMM region covered by chipset * protections. e.g. TSEG. */ |