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Diffstat (limited to 'src/soc/intel/apollolake/fspcar.c')
-rw-r--r--src/soc/intel/apollolake/fspcar.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/fspcar.c b/src/soc/intel/apollolake/fspcar.c
index 8b1089f397..a284116bac 100644
--- a/src/soc/intel/apollolake/fspcar.c
+++ b/src/soc/intel/apollolake/fspcar.c
@@ -25,6 +25,17 @@ const FSPT_UPD temp_ram_init_params = {
.FsptCommonUpd = {
.Revision = 0,
.Reserved = {0},
+ /*
+ * It is a requirement for firmware to have Firmware Interface Table
+ * (FIT), which contains pointers to each microcode update.
+ * The microcode update is loaded for all logical processors before
+ * cpu reset vector.
+ *
+ * All SoC since Gen-4 has above mechanism in place to load microcode
+ * even before hitting CPU reset vector. Hence skipping FSP-T loading
+ * microcode after CPU reset by passing '0' value to
+ * FSPT_UPD.MicrocodeRegionBase and FSPT_UPD.MicrocodeRegionLength.
+ */
.MicrocodeRegionBase = 0,
.MicrocodeRegionLength = 0,
.CodeRegionBase =