diff options
Diffstat (limited to 'src/soc/intel/apollolake/chip.h')
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 30 |
1 files changed, 8 insertions, 22 deletions
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 6e4c82d5a4..c94b7ef180 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -4,6 +4,7 @@ #define _SOC_APOLLOLAKE_CHIP_H_ #include <commonlib/helpers.h> +#include <drivers/intel/gma/gma.h> #include <intelblocks/cfg.h> #include <intelblocks/gspi.h> #include <soc/gpe.h> @@ -24,22 +25,6 @@ enum pnp_settings { PNP_PERF_POWER, }; -struct soc_intel_apl_pp { - unsigned int up_delay_ms; - unsigned int down_delay_ms; - unsigned int cycle_delay_ms; - unsigned int backlight_on_delay_ms; - unsigned int backlight_off_delay_ms; -}; - -struct soc_intel_apl_blc { - unsigned int pwm_hz; - enum { - GPU_BACKLIGHT_POLARITY_HIGH = 0, - GPU_BACKLIGHT_POLARITY_LOW, - } polarity; -}; - struct soc_intel_apollolake_config { /* Common structure containing soc config data required by common code*/ @@ -48,12 +33,13 @@ struct soc_intel_apollolake_config { /* Common struct containing power limits configuration info */ struct soc_power_limits_config power_limits_config; - /* IGD panel configuration */ - struct soc_intel_apl_pp gpu_pp[2]; - /* Second backlight control shares logic with other pins (aka. display - utility pin). Be sure it's used for PWM before setting any value for - the secondary controls. */ - struct soc_intel_apl_blc gpu_blc[2]; + /* + * IGD panel configuration + * + * Second backlight control shares logic with other pins (aka. display utility pin). + * Be sure it's used for PWM before setting any secondary backlight value. + */ + struct i915_gpu_panel_config panel_cfg[2]; /* * Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has |