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Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
-rw-r--r--src/soc/intel/apollolake/chip.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 68459e602a..00470a201a 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -33,6 +33,7 @@
#include <soc/pci_devs.h>
#include <spi-generic.h>
#include <soc/pm.h>
+#include <soc/p2sb.h>
#include "chip.h"
@@ -153,6 +154,14 @@ static void soc_init(void *data)
range_entry_init(&range, 0x200000, 4ULL*GiB, 0);
fsp_silicon_init(&range);
+ /*
+ * Keep the P2SB device visible so it and the other devices are
+ * visible in coreboot for driver support and PCI resource allocation.
+ * There is a UPD setting for this, but it's more consistent to use
+ * hide and unhide symmetrically.
+ */
+ p2sb_unhide();
+
/* Allocate ACPI NVS in CBMEM */
gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
}
@@ -346,8 +355,11 @@ static void fsp_notify_dummy(void *arg)
fsp_handle_reset(ret);
}
/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
- if (ph == READY_TO_BOOT)
+ if (ph == READY_TO_BOOT) {
fsp_notify_dummy((void *)END_OF_FIRMWARE);
+ /* Hide the P2SB device to align with previous behavior. */
+ p2sb_hide();
+ }
}
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,