diff options
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 37fdfff90b..4eabf8a012 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -558,11 +558,18 @@ static void parse_devicetree(FSP_S_CONFIG *silconfig) static void apl_fsp_silicon_init_params_cb(struct soc_intel_apollolake_config *cfg, FSP_S_CONFIG *silconfig) { -#if !CONFIG(SOC_INTEL_GLK) /* GLK FSP does not have these - fields in FspsUpd.h yet */ +#if !CONFIG(SOC_INTEL_GLK) /* GLK FSP does not have these fields in FspsUpd.h yet */ uint8_t port; for (port = 0; port < APOLLOLAKE_USB2_PORT_MAX; port++) { + if (cfg->usb_config_override) { + if (!cfg->usb2_port[port].enable) + continue; + + silconfig->PortUsb20Enable[port] = 1; + silconfig->PortUs20bOverCurrentPin[port] = cfg->usb2_port[port].oc_pin; + } + if (cfg->usb2eye[port].Usb20PerPortTxPeHalf != 0) silconfig->PortUsb20PerPortTxPeHalf[port] = cfg->usb2eye[port].Usb20PerPortTxPeHalf; @@ -591,6 +598,16 @@ static void apl_fsp_silicon_init_params_cb(struct soc_intel_apollolake_config silconfig->PortUsb20HsNpreDrvSel[port] = cfg->usb2eye[port].Usb20HsNpreDrvSel; } + + if (cfg->usb_config_override) { + for (port = 0; port < APOLLOLAKE_USB3_PORT_MAX; port++) { + if (!cfg->usb3_port[port].enable) + continue; + + silconfig->PortUsb30Enable[port] = 1; + silconfig->PortUs30bOverCurrentPin[port] = cfg->usb3_port[port].oc_pin; + } + } #endif } |