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Diffstat (limited to 'src/soc/intel/apollolake/car.c')
-rw-r--r--src/soc/intel/apollolake/car.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/intel/apollolake/car.c b/src/soc/intel/apollolake/car.c
index f46e0f89ec..920580d0a1 100644
--- a/src/soc/intel/apollolake/car.c
+++ b/src/soc/intel/apollolake/car.c
@@ -20,19 +20,13 @@
#include <cpu/x86/msr.h>
#include <intelblocks/msr.h>
#include <program_loading.h>
+#include <soc/cpu.h>
/*
* This file supports the necessary hoops one needs to jump through since
* early FSP component and early stages are running from cache-as-ram.
*/
-static void flush_l1d_to_l2(void)
-{
- msr_t msr = rdmsr(MSR_POWER_MISC);
- msr.lo |= FLUSH_DL1_L2;
- wrmsr(MSR_POWER_MISC, msr);
-}
-
static inline int is_car_addr(uintptr_t addr)
{
return ((addr >= CONFIG_DCACHE_RAM_BASE) &&