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Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/romstage/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 9720d9e549..45421c810b 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -142,6 +142,10 @@ void mainboard_romstage_entry(void) timestamp_add_now(TS_CSE_FW_SYNC_END); } + /* Update coreboot timestamp table with CSE timestamps */ + if (CONFIG(SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY)) + cse_get_telemetry_data(); + /* * Set low maximum temp threshold value used for dynamic thermal sensor * shutdown consideration. |