diff options
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/romstage.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3570f27578..6b0a27a47b 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -98,6 +98,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_USB4_XHCI select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG + select SOC_INTEL_COMMON_BASECODE select SOC_INTEL_COMMON_FSP_RESET select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 5e79535ecf..3f29fc30b9 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -9,6 +9,7 @@ #include <intelblocks/pmclib.h> #include <intelblocks/smbus.h> #include <intelblocks/thermal.h> +#include <intelbasecode/debug_feature.h> #include <memory_info.h> #include <soc/intel/common/smbios.h> #include <soc/iomap.h> @@ -134,6 +135,9 @@ void mainboard_romstage_entry(void) /* Initialize HECI interface */ heci_init(HECI1_BASE_ADDRESS); + if (CONFIG(SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE)) + pre_mem_debug_init(); + s3wake = pmc_fill_power_state(ps) == ACPI_S3; if (CONFIG(SOC_INTEL_CSE_LITE_SKU) && !s3wake) { |