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Diffstat (limited to 'src/soc/intel/alderlake/chip.h')
-rw-r--r--src/soc/intel/alderlake/chip.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index df978a99e6..16f1390a89 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -95,6 +95,11 @@ enum soc_intel_alderlake_power_limits {
RPL_S_201_35W_CORE,
RPL_S_201_46W_CORE,
RPL_S_201_65W_CORE,
+ RPL_HX_8_16_55W_CORE,
+ RPL_HX_8_12_55W_CORE,
+ RPL_HX_8_8_55W_CORE,
+ RPL_HX_6_8_55W_CORE,
+ RPL_HX_6_4_55W_CORE,
ADL_POWER_LIMITS_COUNT
};
@@ -109,6 +114,7 @@ enum soc_intel_alderlake_cpu_tdps {
TDP_35W = 35,
TDP_45W = 45,
TDP_46W = 46,
+ TDP_55W = 55,
TDP_58W = 58,
TDP_60W = 60,
TDP_65W = 65,
@@ -188,6 +194,14 @@ static const struct {
{ PCI_DID_INTEL_ADL_S_ID_12, RPL_S_201_35W_CORE, TDP_35W },
{ PCI_DID_INTEL_ADL_S_ID_12, RPL_S_201_46W_CORE, TDP_46W },
{ PCI_DID_INTEL_ADL_S_ID_12, RPL_S_201_65W_CORE, TDP_65W },
+ { PCI_DID_INTEL_RPL_HX_ID_1, RPL_HX_8_16_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_2, RPL_HX_8_12_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_3, RPL_HX_8_8_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_4, RPL_HX_6_8_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_5, RPL_HX_6_4_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_6, RPL_HX_8_8_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_7, RPL_HX_6_8_55W_CORE, TDP_55W },
+ { PCI_DID_INTEL_RPL_HX_ID_8, RPL_HX_6_4_55W_CORE, TDP_55W },
};
/* Types of display ports */