diff options
Diffstat (limited to 'src/soc/intel/alderlake/acpi/southbridge.asl')
| -rw-r--r-- | src/soc/intel/alderlake/acpi/southbridge.asl | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/acpi/southbridge.asl b/src/soc/intel/alderlake/acpi/southbridge.asl new file mode 100644 index 0000000000..373dca5840 --- /dev/null +++ b/src/soc/intel/alderlake/acpi/southbridge.asl @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <intelblocks/itss.h> +#include <intelblocks/pcr.h> +#include <soc/itss.h> +#include <soc/pcr_ids.h> + +/* PCI IRQ assignment */ +#include "pci_irqs.asl" + +/* PCR access */ +#include <soc/intel/common/acpi/pcr.asl> + +/* PCH clock */ +#include "camera_clock_ctl.asl" + +/* GPIO controller */ +#include "gpio.asl" + +/* ESPI 0:1f.0 */ +#include <soc/intel/common/block/acpi/acpi/lpc.asl> + +/* PCH HDA */ +#include "pch_hda.asl" + +/* PCIE Ports */ +#include "pcie.asl" + +/* Serial IO */ +#include "serialio.asl" + +/* SMBus 0:1f.4 */ +#include <soc/intel/common/block/acpi/acpi/smbus.asl> + +/* ISH 0:12.0 */ +#include <soc/intel/common/block/acpi/acpi/ish.asl> + +/* USB XHCI 0:14.0 */ +#include "xhci.asl" + +/* PCI _OSC */ +#include <soc/intel/common/acpi/pci_osc.asl> + +/* PMC Core*/ +#include <soc/intel/common/block/acpi/acpi/pmc.asl> + +/* GbE 0:1f.6 */ +#include <soc/intel/common/block/acpi/acpi/pch_glan.asl> |