diff options
Diffstat (limited to 'src/soc/intel/alderlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index bb14d72c80..db99d89aec 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -69,6 +69,24 @@ endif CPPFLAGS_common += -I$(src)/soc/intel/alderlake CPPFLAGS_common += -I$(src)/soc/intel/alderlake/include +ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) +# 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples +# 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples +# ADL-S/HX C0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-02 +# ADL-S H0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05 +else +ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) +# 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples +# Missing 06-9a-02 ADL-P K0 +# ADL-P L0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-03 +# ADL-P R0 and ADL-M R0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04 +endif +endif + ifeq ($(CONFIG_STITCH_ME_BIN),y) $(eval $(call cse_add_dummy_to_bp1_bp2,DLMP)) |