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path: root/src/soc/dmp/vortex86ex/southbridge.c
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Diffstat (limited to 'src/soc/dmp/vortex86ex/southbridge.c')
-rw-r--r--src/soc/dmp/vortex86ex/southbridge.c78
1 files changed, 39 insertions, 39 deletions
diff --git a/src/soc/dmp/vortex86ex/southbridge.c b/src/soc/dmp/vortex86ex/southbridge.c
index 05702d1eb6..451aea67c0 100644
--- a/src/soc/dmp/vortex86ex/southbridge.c
+++ b/src/soc/dmp/vortex86ex/southbridge.c
@@ -207,7 +207,7 @@ static void pci_routing_fixup(struct device *dev)
ext_int_routing |= irq_to_int_routing[CAN_IRQ] << CAN_IRQ_SHIFT;
ext_int_routing |= irq_to_int_routing[HDA_IRQ] << HDA_IRQ_SHIFT;
ext_int_routing |= irq_to_int_routing[USBD_IRQ] << USBD_IRQ_SHIFT;
-#if CONFIG_IDE_NATIVE_MODE
+#if IS_ENABLED(CONFIG_IDE_NATIVE_MODE)
/* IDE in native mode, only uses one IRQ. */
ext_int_routing |= irq_to_int_routing[0] << SIDE_IRQ_SHIFT;
ext_int_routing |= irq_to_int_routing[PIDE_IRQ] << PIDE_IRQ_SHIFT;
@@ -250,21 +250,21 @@ static void vortex_sb_init(struct device *dev)
{
u32 lpt_reg = 0;
-#if CONFIG_LPT_ENABLE
+#if IS_ENABLED(CONFIG_LPT_ENABLE)
int ppmod = 0;
-#if CONFIG_LPT_MODE_BPP
+#if IS_ENABLED(CONFIG_LPT_MODE_BPP)
ppmod = 0;
-#elif CONFIG_LPT_MODE_EPP_19_AND_SPP
+#elif IS_ENABLED(CONFIG_LPT_MODE_EPP_19_AND_SPP)
ppmod = 1;
-#elif CONFIG_LPT_MODE_ECP
+#elif IS_ENABLED(CONFIG_LPT_MODE_ECP)
ppmod = 2;
-#elif CONFIG_LPT_MODE_ECP_AND_EPP_19
+#elif IS_ENABLED(CONFIG_LPT_MODE_ECP_AND_EPP_19)
ppmod = 3;
-#elif CONFIG_LPT_MODE_SPP
+#elif IS_ENABLED(CONFIG_LPT_MODE_SPP)
ppmod = 4;
-#elif CONFIG_LPT_MODE_EPP_17_AND_SPP
+#elif IS_ENABLED(CONFIG_LPT_MODE_EPP_17_AND_SPP)
ppmod = 5;
-#elif CONFIG_LPT_MODE_ECP_AND_EPP_17
+#elif IS_ENABLED(CONFIG_LPT_MODE_ECP_AND_EPP_17)
ppmod = 7;
#else
#error CONFIG_LPT_MODE error.
@@ -303,67 +303,67 @@ static void ex_sb_gpio_init(struct device *dev)
* Bit 31-16 : DBA, GPIO direction base address.
* Bit 15-0 : DPBA, GPIO data port base address.
* */
-#if CONFIG_GPIO_P0_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P0_ENABLE)
SETUP_GPIO_ADDR(0)
#endif
-#if CONFIG_GPIO_P1_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P1_ENABLE)
SETUP_GPIO_ADDR(1)
#endif
-#if CONFIG_GPIO_P2_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P2_ENABLE)
SETUP_GPIO_ADDR(2)
#endif
-#if CONFIG_GPIO_P3_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P3_ENABLE)
SETUP_GPIO_ADDR(3)
#endif
-#if CONFIG_GPIO_P4_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P4_ENABLE)
SETUP_GPIO_ADDR(4)
#endif
-#if CONFIG_GPIO_P5_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P5_ENABLE)
SETUP_GPIO_ADDR(5)
#endif
-#if CONFIG_GPIO_P6_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P6_ENABLE)
SETUP_GPIO_ADDR(6)
#endif
-#if CONFIG_GPIO_P7_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P7_ENABLE)
SETUP_GPIO_ADDR(7)
#endif
-#if CONFIG_GPIO_P8_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P8_ENABLE)
SETUP_GPIO_ADDR(8)
#endif
-#if CONFIG_GPIO_P9_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P9_ENABLE)
SETUP_GPIO_ADDR(9)
#endif
/* Enable GPIO port 0~9. */
outl(gpio_enable_mask, base);
/* Set GPIO port 0-9 initial dir and data. */
-#if CONFIG_GPIO_P0_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P0_ENABLE)
INIT_GPIO(0)
#endif
-#if CONFIG_GPIO_P1_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P1_ENABLE)
INIT_GPIO(1)
#endif
-#if CONFIG_GPIO_P2_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P2_ENABLE)
INIT_GPIO(2)
#endif
-#if CONFIG_GPIO_P3_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P3_ENABLE)
INIT_GPIO(3)
#endif
-#if CONFIG_GPIO_P4_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P4_ENABLE)
INIT_GPIO(4)
#endif
-#if CONFIG_GPIO_P5_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P5_ENABLE)
INIT_GPIO(5)
#endif
-#if CONFIG_GPIO_P6_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P6_ENABLE)
INIT_GPIO(6)
#endif
-#if CONFIG_GPIO_P7_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P7_ENABLE)
INIT_GPIO(7)
#endif
-#if CONFIG_GPIO_P8_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P8_ENABLE)
INIT_GPIO(8)
#endif
-#if CONFIG_GPIO_P9_ENABLE
+#if IS_ENABLED(CONFIG_GPIO_P9_ENABLE)
INIT_GPIO(9)
#endif
/* Disable GPIO Port Config IO Base Address. */
@@ -391,34 +391,34 @@ static void ex_sb_uart_init(struct device *dev)
/* S/B register 61h - 60h : UART Config IO Base Address */
pci_write_config16(dev, SB_REG_UART_CFG_IO_BASE, base | 1);
/* setup UART */
-#if CONFIG_UART1_ENABLE
+#if IS_ENABLED(CONFIG_UART1_ENABLE)
SETUP_UART(1)
#endif
-#if CONFIG_UART2_ENABLE
+#if IS_ENABLED(CONFIG_UART2_ENABLE)
SETUP_UART(2)
#endif
-#if CONFIG_UART3_ENABLE
+#if IS_ENABLED(CONFIG_UART3_ENABLE)
SETUP_UART(3)
#endif
-#if CONFIG_UART4_ENABLE
+#if IS_ENABLED(CONFIG_UART4_ENABLE)
SETUP_UART(4)
#endif
-#if CONFIG_UART5_ENABLE
+#if IS_ENABLED(CONFIG_UART5_ENABLE)
SETUP_UART(5)
#endif
-#if CONFIG_UART6_ENABLE
+#if IS_ENABLED(CONFIG_UART6_ENABLE)
SETUP_UART(6)
#endif
-#if CONFIG_UART7_ENABLE
+#if IS_ENABLED(CONFIG_UART7_ENABLE)
SETUP_UART(7)
#endif
-#if CONFIG_UART8_ENABLE
+#if IS_ENABLED(CONFIG_UART8_ENABLE)
SETUP_UART(8)
#endif
-#if CONFIG_UART9_ENABLE
+#if IS_ENABLED(CONFIG_UART9_ENABLE)
SETUP_UART(9)
#endif
-#if CONFIG_UART10_ENABLE
+#if IS_ENABLED(CONFIG_UART10_ENABLE)
SETUP_UART(10)
#endif
/* Keep UART Config I/O base address */