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-rw-r--r--src/soc/amd/picasso/acpi.c7
-rw-r--r--src/soc/amd/picasso/acpi/cpu.asl1
-rw-r--r--src/soc/amd/picasso/acpi/globalnvs.asl2
-rw-r--r--src/soc/amd/picasso/include/soc/nvs.h2
-rw-r--r--src/soc/amd/stoneyridge/acpi.c7
-rw-r--r--src/soc/amd/stoneyridge/acpi/cpu.asl1
-rw-r--r--src/soc/amd/stoneyridge/acpi/globalnvs.asl2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/nvs.h2
8 files changed, 14 insertions, 10 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index ed2be4845c..ebb2bcd195 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -384,6 +384,10 @@ void generate_cpu_entries(const struct device *device)
acpigen_pop_len();
}
+
+ acpigen_write_scope("\\");
+ acpigen_write_name_integer("PCNT", logical_cores);
+ acpigen_pop_len();
}
unsigned long southbridge_write_acpi_tables(const struct device *device,
@@ -398,9 +402,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
/* Set unknown wake source */
gnvs->pm1i = ~0ULL;
gnvs->gpei = ~0ULL;
-
- /* CPU core count */
- gnvs->pcnt = dev_count_cpu();
}
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
diff --git a/src/soc/amd/picasso/acpi/cpu.asl b/src/soc/amd/picasso/acpi/cpu.asl
index e1b7498f09..294d89f481 100644
--- a/src/soc/amd/picasso/acpi/cpu.asl
+++ b/src/soc/amd/picasso/acpi/cpu.asl
@@ -36,6 +36,7 @@ Method (PNOT)
* Processor Object
*/
/* These devices are created at runtime */
+External (\PCNT, IntObj)
External (\_SB.C000, DeviceObj)
External (\_SB.C001, DeviceObj)
External (\_SB.C002, DeviceObj)
diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl
index 9d3f381f97..31d375c5e4 100644
--- a/src/soc/amd/picasso/acpi/globalnvs.asl
+++ b/src/soc/amd/picasso/acpi/globalnvs.asl
@@ -12,7 +12,7 @@ Name (PICM, Zero) /* Interrupt Mode used by OS. Assume PIC. */
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */
- PCNT, 8, // 0x00 - Processor Count
+ , 8, // 0x00 - Processor Count
LIDS, 8, // 0x01 - LID State
PWRS, 8, // 0x02 - AC Power State
CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h
index f10fbdde58..b8945ffe3a 100644
--- a/src/soc/amd/picasso/include/soc/nvs.h
+++ b/src/soc/amd/picasso/include/soc/nvs.h
@@ -14,7 +14,7 @@
struct __packed global_nvs {
/* Miscellaneous */
- uint8_t pcnt; /* 0x00 - Processor Count */
+ uint8_t unused_was_pcnt; /* 0x00 - Processor Count */
uint8_t lids; /* 0x01 - LID State */
uint8_t pwrs; /* 0x02 - AC Power State */
uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 19add66f87..ae2de671dd 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -152,6 +152,10 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor(cpu, 0, 0);
acpigen_pop_len();
}
+
+ acpigen_write_scope("\\");
+ acpigen_write_name_integer("PCNT", cores);
+ acpigen_pop_len();
}
unsigned long southbridge_write_acpi_tables(const struct device *device,
@@ -166,9 +170,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
/* Set unknown wake source */
gnvs->pm1i = ~0ULL;
gnvs->gpei = ~0ULL;
-
- /* CPU core count */
- gnvs->pcnt = dev_count_cpu();
}
static void acpigen_soc_get_gpio_in_local5(uintptr_t addr)
diff --git a/src/soc/amd/stoneyridge/acpi/cpu.asl b/src/soc/amd/stoneyridge/acpi/cpu.asl
index ca5f2496c8..24b81a13ab 100644
--- a/src/soc/amd/stoneyridge/acpi/cpu.asl
+++ b/src/soc/amd/stoneyridge/acpi/cpu.asl
@@ -9,6 +9,7 @@ Method (PNOT)
* Processor Object
*/
/* These devices are created at runtime */
+External (\PCNT, IntObj)
External (\_SB.P000, DeviceObj)
External (\_SB.P001, DeviceObj)
External (\_SB.P002, DeviceObj)
diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
index 7a48dd57f8..ce3653c561 100644
--- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl
+++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
@@ -9,7 +9,7 @@
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */
- PCNT, 8, // 0x00 - Processor Count
+ , 8, // 0x00 - Processor Count
LIDS, 8, // 0x01 - LID State
PWRS, 8, // 0x02 - AC Power State
CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index e4a158c7cb..055d74bbd1 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -14,7 +14,7 @@
struct __packed global_nvs {
/* Miscellaneous */
- uint8_t pcnt; /* 0x00 - Processor Count */
+ uint8_t unused_was_pcnt; /* 0x00 - Processor Count */
uint8_t lids; /* 0x01 - LID State */
uint8_t pwrs; /* 0x02 - AC Power State */
uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */