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-rw-r--r--src/soc/amd/glinda/Kconfig5
-rw-r--r--src/soc/amd/mendocino/Kconfig5
-rw-r--r--src/soc/amd/phoenix/Kconfig5
3 files changed, 3 insertions, 12 deletions
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig
index 214fc81b7b..f9dee4288a 100644
--- a/src/soc/amd/glinda/Kconfig
+++ b/src/soc/amd/glinda/Kconfig
@@ -296,10 +296,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
- Instruct the SoC to not use the state of GPIO_129 as keyboard reset
- signal. When this pin is used as GPIO and the keyboard reset
- functionality isn't disabled, configuring it as an output and driving
- it as 0 will cause a reset.
+ Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index 5b274f90fd..ea3a892fe8 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -310,10 +310,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
- Instruct the SoC to not use the state of GPIO_129 as keyboard reset
- signal. When this pin is used as GPIO and the keyboard reset
- functionality isn't disabled, configuring it as an output and driving
- it as 0 will cause a reset.
+ Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index 37a2fc9c4c..03cf8366ff 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -295,10 +295,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
- Instruct the SoC to not use the state of GPIO_129 as keyboard reset
- signal. When this pin is used as GPIO and the keyboard reset
- functionality isn't disabled, configuring it as an output and driving
- it as 0 will cause a reset.
+ Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"