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-rw-r--r--src/soc/amd/cezanne/acpi/soc.asl2
-rw-r--r--src/soc/amd/mendocino/acpi/soc.asl2
-rw-r--r--src/soc/amd/picasso/acpi/soc.asl2
3 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index 7e3a3ee6a8..f8f7a8a7a8 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -27,7 +27,9 @@ Scope(\_SB) {
#include <soc/amd/common/acpi/upep.asl>
+#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
#include <soc/amd/common/acpi/dptc.asl>
+#endif
#include "rtc_workaround.asl"
diff --git a/src/soc/amd/mendocino/acpi/soc.asl b/src/soc/amd/mendocino/acpi/soc.asl
index 5bce314fc0..91b1444c1d 100644
--- a/src/soc/amd/mendocino/acpi/soc.asl
+++ b/src/soc/amd/mendocino/acpi/soc.asl
@@ -29,7 +29,9 @@ Scope(\_SB) {
#include <soc/amd/common/acpi/upep.asl>
+#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
#include <soc/amd/common/acpi/dptc.asl>
+#endif
#include "rtc_workaround.asl"
diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index d9d40c7f65..c4425ebdd8 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -17,4 +17,6 @@ Device(PCI0) {
/* Add GPIO library */
#include <soc/amd/common/acpi/gpio_bank_lib.asl>
+#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
#include <soc/amd/common/acpi/dptc.asl>
+#endif