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-rw-r--r--src/soc/amd/common/block/include/amdblocks/dimm_spd.h2
-rw-r--r--src/soc/amd/stoneyridge/Kconfig2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
index 60107c9ba4..1ce6d86fa7 100644
--- a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
+++ b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
@@ -22,7 +22,7 @@
/*
* Fill the buf and returns 0 on success.
- * Return -1 on failure and the the caller tries sb_read_spd()
+ * Return -1 on failure and the caller tries sb_read_spd()
* to get the SPD from I2C.
*/
int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len);
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 6255cfca60..529d651243 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -158,7 +158,7 @@ config STONEYRIDGE_XHCI_ENABLE
The XHCI controller must be enabled and the XHCI firmware
must be added in order to have USB 3.0 support configured
by coreboot. The OS will be responsible for enabling the XHCI
- controller if the the XHCI firmware is available but the
+ controller if the XHCI firmware is available but the
XHCI controller is not enabled by coreboot.
config STONEYRIDGE_XHCI_FWM