diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/mendocino/chip.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/fsp_m_params.c | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index 5eb7c41cb7..f161038e98 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -179,6 +179,8 @@ struct soc_amd_mendocino_config { /* Set for eDP power sequence adjustment timing T8 (from varybl to blon). */ uint8_t edp_panel_t8_ms; + /* Set for eDP power sequence adjustment timing T9 (from bloff to varybloff). */ + uint8_t edp_panel_t9_ms; }; diff --git a/src/soc/amd/mendocino/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c index cea26a9acd..6582a7cd50 100644 --- a/src/soc/amd/mendocino/fsp_m_params.c +++ b/src/soc/amd/mendocino/fsp_m_params.c @@ -171,6 +171,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->dxio_tx_vboost_enable = config->dxio_tx_vboost_enable; mcfg->edp_panel_t8_ms = config->edp_panel_t8_ms; + mcfg->edp_panel_t9_ms = config->edp_panel_t9_ms; fsp_fill_pcie_ddi_descriptors(mcfg); fsp_assign_ioapic_upds(mcfg); |