diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/data_fabric_helper.c | 24 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/data_fabric.h | 3 | ||||
| -rw-r--r-- | src/soc/amd/picasso/data_fabric.c | 31 |
3 files changed, 30 insertions, 28 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index e784d508ff..d65bc8dac6 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -3,6 +3,7 @@ #include <amdblocks/data_fabric.h> #include <amdblocks/pci_devs.h> #include <device/pci_ops.h> +#include <soc/data_fabric.h> #include <soc/pci_devs.h> #include <types.h> #include "data_fabric_def.h" @@ -40,3 +41,26 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui data_fabric_set_indirect_address(function, reg, instance_id); pci_write_config32(SOC_DF_F4_DEV, DF_FICAD_LO, data); } + +void data_fabric_disable_mmio_reg(unsigned int reg) +{ + data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), + IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT); + data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), 0); + data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), 0); +} + +static bool is_mmio_reg_disabled(unsigned int reg) +{ + uint32_t val = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(reg)); + return !(val & (MMIO_WE | MMIO_RE)); +} + +int data_fabric_find_unused_mmio_reg(void) +{ + for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { + if (is_mmio_reg_disabled(i)) + return i; + } + return -1; +} diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 386be7a40b..7888a9c31a 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -27,4 +27,7 @@ void data_fabric_broadcast_write32(uint8_t function, uint16_t reg, uint32_t data pci_write_config32(_SOC_DEV(DF_DEV, function), reg, data); } +void data_fabric_disable_mmio_reg(unsigned int reg); +int data_fabric_find_unused_mmio_reg(void); + #endif /* AMD_BLOCK_DATA_FABRIC_H */ diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index 3b6c4f92b1..d07555a437 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -11,31 +11,6 @@ #include <soc/iomap.h> #include <types.h> -static void disable_mmio_reg(unsigned int reg) -{ - data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), - IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT); - data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), 0); - data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), 0); -} - -static bool is_mmio_reg_disabled(unsigned int reg) -{ - uint32_t val = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(reg)); - return !(val & ((MMIO_WE | MMIO_RE))); -} - -static int find_unused_mmio_reg(void) -{ - unsigned int i; - - for (i = 0; i < NUM_NB_MMIO_REGS; i++) { - if (is_mmio_reg_disabled(i)) - return i; - } - return -1; -} - void data_fabric_set_mmio_np(void) { /* @@ -77,14 +52,14 @@ void data_fabric_set_mmio_np(void) continue; /* no overlap at all */ if (base >= np_bot && limit <= np_top) { - disable_mmio_reg(i); /* 100% within, so remove */ + data_fabric_disable_mmio_reg(i); /* 100% within, so remove */ continue; } if (base < np_bot && limit > np_top) { /* Split the configured region */ data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(i), np_bot - 1); - reg = find_unused_mmio_reg(); + reg = data_fabric_find_unused_mmio_reg(); if (reg < 0) { /* Although a pair could be freed later, this condition is * very unusual and deserves analysis. Flag an error and @@ -106,7 +81,7 @@ void data_fabric_set_mmio_np(void) data_fabric_broadcast_write32(0, NB_MMIO_BASE(i), np_top + 1); } - reg = find_unused_mmio_reg(); + reg = data_fabric_find_unused_mmio_reg(); if (reg < 0) { printk(BIOS_ERR, "Error: cannot configure region as NP\n"); return; |