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-rw-r--r--src/soc/amd/genoa/Kconfig2
-rw-r--r--src/soc/amd/genoa/include/soc/smu.h23
2 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index fc4bf57d61..a371d218db 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -18,6 +18,8 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
select SOC_AMD_COMMON_BLOCK_SMI
+ select SOC_AMD_COMMON_BLOCK_SMU
+ select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_USE_ESPI
diff --git a/src/soc/amd/genoa/include/soc/smu.h b/src/soc/amd/genoa/include/soc/smu.h
new file mode 100644
index 0000000000..6ab0c063e5
--- /dev/null
+++ b/src/soc/amd/genoa/include/soc/smu.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_GENOA_SMU_H
+#define AMD_GENOA_SMU_H
+
+/* SMU mailbox register offsets in SMN */
+#define SMN_SMU_MESG_ID 0x3b10530
+#define SMN_SMU_MESG_RESP 0x3b1057c
+#define SMN_SMU_MESG_ARGS_BASE 0x3b109c4
+
+#define SMU_NUM_ARGS 6
+
+enum smu_message_id {
+ SMC_MSG_S3ENTRY = 0x0b,
+};
+
+/*
+ * Request the SMU put system into S3, S4, or S5. On entry, SlpTyp determines S-State and
+ * SlpTypeEn gets set by the SMU. Function does not return if successful.
+ */
+void smu_sx_entry(void);
+
+#endif /* AMD_GENOA_SMU_H */