4 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 15dd38147c..2c415a3e25 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -21,6 +21,7 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/amdfam15.h>
 #include <device/device.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/cpu.h>
 #include <soc/northbridge.h>
diff --git a/src/soc/amd/stoneyridge/nb_util.c b/src/soc/amd/stoneyridge/nb_util.c
index 4d3e53faf3..d5de067814 100644
--- a/src/soc/amd/stoneyridge/nb_util.c
+++ b/src/soc/amd/stoneyridge/nb_util.c
@@ -15,6 +15,7 @@
 
 #include <soc/northbridge.h>
 #include <soc/pci_devs.h>
+#include <device/pci_ops.h>
 
 uint32_t nb_ioapic_read(unsigned int index)
 {
diff --git a/src/soc/amd/stoneyridge/reset.c b/src/soc/amd/stoneyridge/reset.c
index 886f33cdcc..a133a88b92 100644
--- a/src/soc/amd/stoneyridge/reset.c
+++ b/src/soc/amd/stoneyridge/reset.c
@@ -18,6 +18,7 @@
 #include <reset.h>
 #include <soc/northbridge.h>
 #include <soc/pci_devs.h>
+#include <device/pci_ops.h>
 #include <soc/southbridge.h>
 
 /* Clear bits 5, 9 & 10, used to signal the reset type */
diff --git a/src/soc/amd/stoneyridge/tsc_freq.c b/src/soc/amd/stoneyridge/tsc_freq.c
index 1f48306afe..8c18884001 100644
--- a/src/soc/amd/stoneyridge/tsc_freq.c
+++ b/src/soc/amd/stoneyridge/tsc_freq.c
@@ -21,6 +21,7 @@
 #include <cpu/amd/amdfam15.h>
 #include <console/console.h>
 #include <soc/pci_devs.h>
+#include <device/pci_ops.h>
 
 unsigned long tsc_freq_mhz(void)
 {