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-rw-r--r--src/soc/amd/stoneyridge/chip.c3
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c5
3 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 9cae98b9db..f63a7c3779 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -112,9 +112,6 @@ static void enable_dev(struct device *dev)
case DEVICE_PATH_CPU_CLUSTER:
dev->ops = &cpu_bus_ops;
break;
- case DEVICE_PATH_PCI:
- sb_enable(dev);
- break;
case DEVICE_PATH_MMIO:
if (i2c_acpi_name(dev) != NULL)
dev->ops = &stoneyridge_i2c_mmio_ops;
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 219af8437a..9480e8b713 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -238,7 +238,6 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void);
void sb_clk_output_48Mhz(u32 osc);
-void sb_enable(struct device *dev);
void sb_read_mode(u32 mode);
void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index f8a705ed83..161e3e8897 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -352,11 +352,6 @@ void bootblock_fch_init(void)
fch_print_pmxc0_status();
}
-void sb_enable(struct device *dev)
-{
- printk(BIOS_DEBUG, "%s\n", __func__);
-}
-
static void fch_init_acpi_ports(void)
{
u32 reg;