summaryrefslogtreecommitdiff
path: root/src/soc/amd
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/picasso/chip.h2
-rw-r--r--src/soc/amd/picasso/fsp_params.c14
2 files changed, 9 insertions, 7 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 3bcd3cc5c4..d3c9a0721b 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -133,13 +133,13 @@ struct soc_amd_picasso_config {
uint8_t xhci0_force_gen1;
+ uint8_t has_usb2_phy_tune_params;
struct usb2_phy_tune usb_2_port_0_tune_params;
struct usb2_phy_tune usb_2_port_1_tune_params;
struct usb2_phy_tune usb_2_port_2_tune_params;
struct usb2_phy_tune usb_2_port_3_tune_params;
struct usb2_phy_tune usb_2_port_4_tune_params;
struct usb2_phy_tune usb_2_port_5_tune_params;
-
};
typedef struct soc_amd_picasso_config config_t;
diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c
index d07c38493a..d280bffc47 100644
--- a/src/soc/amd/picasso/fsp_params.c
+++ b/src/soc/amd/picasso/fsp_params.c
@@ -102,12 +102,14 @@ static void fsp_usb_oem_customization(FSP_S_CONFIG *scfg,
scfg->xhci0_force_gen1 = cfg->xhci0_force_gen1;
- memcpy(scfg->fch_usb_2_port0_phy_tune, &cfg->usb_2_port_0_tune_params, num);
- memcpy(scfg->fch_usb_2_port1_phy_tune, &cfg->usb_2_port_1_tune_params, num);
- memcpy(scfg->fch_usb_2_port2_phy_tune, &cfg->usb_2_port_2_tune_params, num);
- memcpy(scfg->fch_usb_2_port3_phy_tune, &cfg->usb_2_port_3_tune_params, num);
- memcpy(scfg->fch_usb_2_port4_phy_tune, &cfg->usb_2_port_4_tune_params, num);
- memcpy(scfg->fch_usb_2_port5_phy_tune, &cfg->usb_2_port_5_tune_params, num);
+ if (cfg->has_usb2_phy_tune_params) {
+ memcpy(scfg->fch_usb_2_port0_phy_tune, &cfg->usb_2_port_0_tune_params, num);
+ memcpy(scfg->fch_usb_2_port1_phy_tune, &cfg->usb_2_port_1_tune_params, num);
+ memcpy(scfg->fch_usb_2_port2_phy_tune, &cfg->usb_2_port_2_tune_params, num);
+ memcpy(scfg->fch_usb_2_port3_phy_tune, &cfg->usb_2_port_3_tune_params, num);
+ memcpy(scfg->fch_usb_2_port4_phy_tune, &cfg->usb_2_port_4_tune_params, num);
+ memcpy(scfg->fch_usb_2_port5_phy_tune, &cfg->usb_2_port_5_tune_params, num);
+ }
}
void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)