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-rw-r--r--src/soc/amd/cezanne/early_fch.c1
-rw-r--r--src/soc/amd/cezanne/romstage.c4
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index dd096e05e8..cdb1f12aad 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -17,6 +17,7 @@ void fch_pre_init(void)
fch_smbus_init();
fch_enable_cf9_io();
fch_enable_legacy_io();
+ fch_disable_legacy_dma_io();
enable_aoac_devices();
/*
diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c
index 2740d8c74c..b35e6a56af 100644
--- a/src/soc/amd/cezanne/romstage.c
+++ b/src/soc/amd/cezanne/romstage.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
+#include <amdblocks/acpimmio.h>
#include <amdblocks/memmap.h>
#include <arch/cpu.h>
#include <console/console.h>
@@ -31,6 +32,9 @@ asmlinkage void car_stage_entry(void)
fsp_memory_init(acpi_is_wakeup_s3());
+ /* Fixup settings FSP-M should not be changing */
+ fch_disable_legacy_dma_io();
+
memmap_stash_early_dram_usage();
run_ramstage();