diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/mmio_util.c | 18 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/iomap.h | 8 |
2 files changed, 20 insertions, 6 deletions
diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c index b2df8e7d4d..9e8342b6f8 100644 --- a/src/soc/amd/common/block/acpimmio/mmio_util.c +++ b/src/soc/amd/common/block/acpimmio/mmio_util.c @@ -2,16 +2,25 @@ #include <types.h> #include <arch/io.h> -#include <amdblocks/acpimmio_map.h> #include <amdblocks/acpimmio.h> -#if CONSTANT_ACPIMMIO_BASE_ADDRESS +#if ENV_X86 +#include <amdblocks/acpimmio_map.h> +#endif + +#if ENV_X86 && CONSTANT_ACPIMMIO_BASE_ADDRESS #define DECLARE_ACPIMMIO(ptr, bank) \ uint8_t *const ptr = (void *)(uintptr_t)ACPIMMIO_BASE(bank) #else #define DECLARE_ACPIMMIO(ptr, bank) uint8_t *ptr #endif +DECLARE_ACPIMMIO(acpimmio_aoac, AOAC); +DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX); +DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0); +DECLARE_ACPIMMIO(acpimmio_misc, MISC); + +#if ENV_X86 DECLARE_ACPIMMIO(acpimmio_sm_pci, SM_PCI); DECLARE_ACPIMMIO(acpimmio_gpio_100, GPIO_100); DECLARE_ACPIMMIO(acpimmio_smi, SMI); @@ -25,15 +34,12 @@ DECLARE_ACPIMMIO(acpimmio_asf, ASF); DECLARE_ACPIMMIO(acpimmio_smbus, SMBUS); DECLARE_ACPIMMIO(acpimmio_wdt, WDT); DECLARE_ACPIMMIO(acpimmio_hpet, HPET); -DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX); -DECLARE_ACPIMMIO(acpimmio_misc, MISC); DECLARE_ACPIMMIO(acpimmio_dpvga, DPVGA); -DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0); DECLARE_ACPIMMIO(acpimmio_gpio1, GPIO1); DECLARE_ACPIMMIO(acpimmio_gpio2, GPIO2); DECLARE_ACPIMMIO(acpimmio_xhci_pm, XHCIPM); DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR); -DECLARE_ACPIMMIO(acpimmio_aoac, AOAC); +#endif #undef DECLARE_ACPIMMIO diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 43e56582a1..0296c87dd8 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -3,6 +3,8 @@ #ifndef AMD_PICASSO_IOMAP_H #define AMD_PICASSO_IOMAP_H +#if ENV_X86 + /* MMIO Ranges */ /* IO_APIC_ADDR defined in arch/x86 0xfec00000 */ #define GNB_IO_APIC_ADDR 0xfec01000 @@ -22,6 +24,8 @@ /* Reserved 0xfecd1000-0xfedc3fff */ +#endif /* ENV_X86 */ + /* * Picasso/Dali have I2C0 and I2C1 wired to the Sensor Fusion Hub (SFH/MP2). * The controllers are not directly accessible via the x86. @@ -37,6 +41,8 @@ #define I2C_MASTER_START_INDEX 2 #define I2C_SLAVE_DEV_COUNT 1 +#if ENV_X86 + #define APU_I2C2_BASE 0xfedc4000 #define APU_I2C3_BASE 0xfedc5000 #define APU_I2C4_BASE 0xfedc6000 @@ -62,6 +68,8 @@ #define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1) +#endif /* ENV_X86 */ + /* I/O Ranges */ #define ACPI_SMI_CTL_PORT 0xb2 #define PICASSO_ACPI_IO_BASE CONFIG_PICASSO_ACPI_IO_BASE |