diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/fw.cfg | 8 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fw.cfg | 16 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/fw.cfg | 8 |
3 files changed, 16 insertions, 16 deletions
diff --git a/src/soc/amd/cezanne/fw.cfg b/src/soc/amd/cezanne/fw.cfg index 9757d7249e..ad253982ea 100644 --- a/src/soc/amd/cezanne/fw.cfg +++ b/src/soc/amd/cezanne/fw.cfg @@ -33,8 +33,8 @@ DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin # BDT -PSP_PMUI_FILE1 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin -PSP_PMUD_FILE1 TypeId0x65_Appb_CZN_1D_Lpddr4_Dmem.csbin -PSP_PMUI_FILE2 TypeId0x64_Appb_CZN_2D_Lpddr4_Imem.csbin -PSP_PMUD_FILE2 TypeId0x65_Appb_CZN_2D_Lpddr4_Dmem.csbin +PSP_PMUI_FILE_SUB0_INS1 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin +PSP_PMUD_FILE_SUB0_INS1 TypeId0x65_Appb_CZN_1D_Lpddr4_Dmem.csbin +PSP_PMUI_FILE_SUB0_INS4 TypeId0x64_Appb_CZN_2D_Lpddr4_Imem.csbin +PSP_PMUD_FILE_SUB0_INS4 TypeId0x65_Appb_CZN_2D_Lpddr4_Dmem.csbin PSP_MP2CFG_FILE MP2FWConfig.sbin diff --git a/src/soc/amd/picasso/fw.cfg b/src/soc/amd/picasso/fw.cfg index 516af7bf3a..c9db4b6d59 100644 --- a/src/soc/amd/picasso/fw.cfg +++ b/src/soc/amd/picasso/fw.cfg @@ -29,11 +29,11 @@ PSP_MP2FW2_FILE MP2I2CFWPCO.sbin PSP_MP2CFG_FILE MP2FWConfig.sbin PSP_DRIVERS_FILE drv_sys_prod_RV.sbin # BDT -PSP_PMUI_FILE1 Appb_Rv_1D_Ddr4_Udimm_Imem.csbin -PSP_PMUI_FILE2 Appb_Rv_2D_Ddr4_Imem.csbin -PSP_PMUI_FILE3 Appb_Rv2_1D_ddr4_Udimm_Imem.csbin -PSP_PMUI_FILE4 Appb_Rv2_2D_ddr4_Udimm_Imem.csbin -PSP_PMUD_FILE1 Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin -PSP_PMUD_FILE2 Appb_Rv_2D_Ddr4_Dmem.csbin -PSP_PMUD_FILE3 Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin -PSP_PMUD_FILE4 Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin +PSP_PMUI_FILE_SUB0_INS1 Appb_Rv_1D_Ddr4_Udimm_Imem.csbin +PSP_PMUI_FILE_SUB0_INS4 Appb_Rv_2D_Ddr4_Imem.csbin +PSP_PMUI_FILE_SUB1_INS1 Appb_Rv2_1D_ddr4_Udimm_Imem.csbin +PSP_PMUI_FILE_SUB1_INS4 Appb_Rv2_2D_ddr4_Udimm_Imem.csbin +PSP_PMUD_FILE_SUB0_INS1 Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin +PSP_PMUD_FILE_SUB0_INS4 Appb_Rv_2D_Ddr4_Dmem.csbin +PSP_PMUD_FILE_SUB1_INS1 Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin +PSP_PMUD_FILE_SUB1_INS4 Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin diff --git a/src/soc/amd/sabrina/fw.cfg b/src/soc/amd/sabrina/fw.cfg index 95dd4e138f..f321435c1b 100644 --- a/src/soc/amd/sabrina/fw.cfg +++ b/src/soc/amd/sabrina/fw.cfg @@ -35,8 +35,8 @@ DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin # BDT -PSP_PMUI_FILE1 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin -PSP_PMUD_FILE1 TypeId0x65_Appb_CZN_1D_Lpddr4_Dmem.csbin -PSP_PMUI_FILE2 TypeId0x64_Appb_CZN_2D_Lpddr4_Imem.csbin -PSP_PMUD_FILE2 TypeId0x65_Appb_CZN_2D_Lpddr4_Dmem.csbin +PSP_PMUI_FILE_SUB0_INS1 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin +PSP_PMUD_FILE_SUB0_INS1 TypeId0x65_Appb_CZN_1D_Lpddr4_Dmem.csbin +PSP_PMUI_FILE_SUB0_INS4 TypeId0x64_Appb_CZN_2D_Lpddr4_Imem.csbin +PSP_PMUD_FILE_SUB0_INS4 TypeId0x65_Appb_CZN_2D_Lpddr4_Dmem.csbin PSP_MP2CFG_FILE MP2FWConfig.sbin |