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-rw-r--r--src/soc/amd/common/acpi/gpio_bank_lib.asl18
-rw-r--r--src/soc/amd/common/acpi/lpc.asl8
-rw-r--r--src/soc/amd/common/acpi/thermal_zone.asl22
3 files changed, 24 insertions, 24 deletions
diff --git a/src/soc/amd/common/acpi/gpio_bank_lib.asl b/src/soc/amd/common/acpi/gpio_bank_lib.asl
index f73340cc4d..9686ddc1c9 100644
--- a/src/soc/amd/common/acpi/gpio_bank_lib.asl
+++ b/src/soc/amd/common/acpi/gpio_bank_lib.asl
@@ -6,14 +6,14 @@
Method (GPAD, 0x1)
{
/* Arg0 - GPIO pin number */
- Return (Add(Multiply(Arg0, 4), ACPIMMIO_GPIO0_BASE))
+ Return ((Arg0 * 4) + ACPIMMIO_GPIO0_BASE)
}
/* Read pin control dword */
Method (GPRD, 0x1, Serialized)
{
/* Arg0 - GPIO pin control MMIO address */
- Store (Arg0, Local0)
+ Local0 = Arg0
OperationRegion (GPDW, SystemMemory, Local0, 4)
Field (GPDW, AnyAcc, NoLock, Preserve) {
TEMP, 32
@@ -26,12 +26,12 @@ Method (GPWR, 0x2, Serialized)
{
/* Arg0 - GPIO pin control MMIO address */
/* Arg1 - Value for control register */
- Store (Arg0, Local0)
+ Local0 = Arg0
OperationRegion (GPDW, SystemMemory, Local0, 4)
Field (GPDW, AnyAcc, NoLock, Preserve) {
TEMP,32
}
- Store (Arg1, TEMP)
+ TEMP = Arg1
}
Method (GPGB, 0x2)
@@ -41,8 +41,8 @@ Method (GPGB, 0x2)
* Arg0 - GPIO pin control MMIO address
* Arg1 - Desired byte (0 through 3)
*/
- Store (Multiply(Arg1, 8), Local2)
- Return (And(ShiftRight(GPRD(Arg0), Local2), 0x000000FF))
+ Local2 = Arg1 * 8
+ Return ((GPRD (Arg0) >> Local2) & 0x000000FF)
}
Method (GPSB, 0x3)
@@ -53,9 +53,9 @@ Method (GPSB, 0x3)
* Arg1 - Desired byte (0 through 3)
* Arg2 - Value
*/
- Store (Multiply(Arg1, 8), Local2)
- And(ShiftRight(GPRD(Arg0), Local2), 0xFFFFFF00, Local3)
- ShiftLeft (Or(And(Arg2, 0x000000FF),Local3), Local2, Local4)
+ Local2 = Arg1 * 8
+ Local3 = (GPRD(Arg0) >> Local2) & 0xFFFFFF00
+ Local4 = ((Arg2 & 0x000000FF) | Local3) << Local2
GPWR (Arg0, Local4)
}
diff --git a/src/soc/amd/common/acpi/lpc.asl b/src/soc/amd/common/acpi/lpc.asl
index e4b0689bd2..d2224e8f13 100644
--- a/src/soc/amd/common/acpi/lpc.asl
+++ b/src/soc/amd/common/acpi/lpc.asl
@@ -41,10 +41,10 @@ Device(LPCB) {
{
CreateDwordField(^CRS,^BAR0._BAS,SPIB) // Field to hold SPI base address
CreateDwordField(^CRS,^BAR1._BAS,ESPB) // Field to hold eSPI base address
- And(BAR, 0xffffff00, Local0)
- Store(Local0, SPIB) // SPI base address mapped
- Add(Local0, 0x10000, Local1)
- Store(Local1, ESPB) // eSPI base address mapped
+ Local0 = BAR & 0xffffff00
+ SPIB = Local0 // SPI base address mapped
+ Local1 = Local0 + 0x10000
+ ESPB = Local1 // eSPI base address mapped
Return(CRS)
}
}
diff --git a/src/soc/amd/common/acpi/thermal_zone.asl b/src/soc/amd/common/acpi/thermal_zone.asl
index b33ba97489..c80f3bf95d 100644
--- a/src/soc/amd/common/acpi/thermal_zone.asl
+++ b/src/soc/amd/common/acpi/thermal_zone.asl
@@ -48,16 +48,16 @@ ThermalZone (TZ00) {
Name (_STR, Unicode ("AMD CPU Core Thermal Sensor"))
Method (_STA) {
- If (LEqual (HTCE, One)) {
+ If (HTCE == 1) {
Return (0x0F)
}
- Return (Zero)
+ Return (0)
}
Method (_TMP) { /* Current temp in tenths degree Kelvin. */
- Multiply (TNOW, 10, Local0)
- ShiftRight (Local0, 3, Local0)
- Return (Add (Local0, K10TEMP_KELVIN_OFFSET))
+ Local0 = TNOW * 10
+ Local0 >>= 3
+ Return (Local0 + K10TEMP_KELVIN_OFFSET)
}
/*
@@ -65,17 +65,17 @@ ThermalZone (TZ00) {
* P-State and power consumption in order to cool down.
*/
Method (_PSV) { /* Passive temp in tenths degree Kelvin. */
- Multiply (TLMT, 10, Local0)
- ShiftRight (Local0, 1, Local0)
- Add (Local0, K10TEMP_TLIMIT_OFFSET, Local0)
- Return (Add (Local0, K10TEMP_KELVIN_OFFSET))
+ Local0 = TLMT * 10
+ Local0 >>= 1
+ Local0 += K10TEMP_TLIMIT_OFFSET
+ Return (Local0 + K10TEMP_KELVIN_OFFSET)
}
Method (_HOT) { /* Hot temp in tenths degree Kelvin. */
- Return (Add (_PSV, K10TEMP_HOT_OFFSET))
+ Return (_PSV + K10TEMP_HOT_OFFSET)
}
Method (_CRT) { /* Critical temp in tenths degree Kelvin. */
- Return (Add (_HOT, K10TEMP_HOT_OFFSET))
+ Return (_HOT + K10TEMP_HOT_OFFSET)
}
}